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EP3C5E144C8N
FPGA, CYCLONE III, 5K LE, 144EQFP
產品總覽
- 2 Phase-locked loops
- 70 Differential channels
- Hot-socketing operation support
- Routing architecture optimized for design separation flow with the Quartus® II software
- Ability to disable external JTAG port
- Error detection (ED) cycle indicator to core
- Internal oscillator enables system monitor and health check capabilities
- High memory-to-logic and multiplier-to-logic ratio
- High I/O count, low-and mid-range density devices for user I/O constrained applications
- Remote system upgrade without the aid of an external controller
- Dedicated cyclical redundancy code checker circuitry to detect single-event upset (SEU) issues
應用
Automotive, Consumer Electronics, Wireless, Aerospace, Defence, Military, Industrial, Imaging, Video & Vision
警告
產品訊息
技術文件 (1)
CAD 下載
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