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CPLD, MachXO2 Series, FLASH, 640 Macrocells, 79 I/O's, TQFP, 100 Pins, 4


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Product Overview

The LCMXO2-640HC-4TG100C is an ultra low power instant-on non-volatile PLD with densities of 640 Look-up Tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), pre-engineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I²C controller and timer/counter. It features allow these devices to be used in low cost, high volume consumer and system applications. The MachXO2 devices are designed on a 65nm non-volatile low power process. The device architecture has several features such as programmable low swing differential I/Os and the ability to turn off I/O banks, on-chip PLLs and oscillators dynamically. These features help manage static and dynamic power consumption resulting in low static power for all members of the family.
  • Flexible logic architecture
  • Ultra low power devices - Programmable low swing differential I/Os
  • Up to 240kB sysMEM™ embedded block RAM
  • Up to 54kB distributed RAM
  • Dedicated FIFO control logic
  • On-chip user flash memory - 100,000 write cycles
  • Pre-engineered source synchronous I/O - Dedicated gearing logic
  • High performance, flexible I/O buffer - On-chip differential termination
  • Flexible on-chip clocking - Eight primary clocks
  • Non-volatile, infinitely reconfigurable - Instant-on, powers up in microseconds
  • TransFR™ reconfiguration - In-field logic update while system operates
  • Enhanced system level support - On-chip oscillator with 5.5% accuracy




ESD sensitive device, take proper precaution while handling the device. Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.

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MSL 3 - 168 hours

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Technical Documents (1)

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