EPM1270T144C3N

EPM1270T144C3N is a MAX® II family of instant-on, non-volatile CPLD. This CPLD is based on a 0.18µm, 6-layer-metal-flash process with a density of 1270 LE and non-volatile storage of 8Kbits. MAX II devices offer high I/O counts, fast performance, and reliable fitting versus other CPLD architectures. Featuring MultiVolt core, a user flash memory (UFM) block, and enhanced in-system programmability (ISP), MAX II devices are designed to reduce cost and power while providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR) and sequencing control, and device configuration control. Features built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990.

• 2.5V or 3.3V VCCINT device (multiVolt core external supply voltage)
• Low-cost, low-power CPLD and instant-on, non-volatile architecture
• 980 typical equivalent macrocells and 8,192 UFM size (bits)
• Provides fast propagation delay and clock-to-output times
• 212 maximum user I/O pins
• 304MHz maximum global clock frequency for 16bit counter
• Bus-friendly architect including programmable SR, drive strength, bus-hold, programmable PU resistor
• Schmitt triggers enabling noise tolerant inputs (programmable per pin)
• Supports hot-socketing and ISP circuitry compliant with IEEE Std. 1532
• 144 pin TQFP package and commercial operating temperature range from 0°C to 85°C