AD8612ARUZ

AD8612 is a dual 4ns comparator with a latch function and complementary output. This is a good choice for timing circuits and line receivers. Propagation delays for rising and falling signals are closely matched and tracked over temperature. It is a good choice for clock recovery because the duty cycle of the output matches the duty cycle of the input. Application includes high speed timing, clock recovery and clock distribution, line receivers, digital communications, phase detectors, high speed sampling, read channel detection, PCMCIA cards, zero-crossing detector, high speed analogue-to-digital converter (ADC), upgrade for LT1394 and LT1016 designs.

• Offset voltage is 1mV (typ, V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Offset voltage drift is 4μV/°C (typ, V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Input common-mode voltage range from 0.0 to 3.0V (V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Common-mode rejection ratio is 85dB (typ, 0V ≤ VCM ≤ 3.0V, TA = 25°C)
• Input capacitance is 3.0pF (typ, V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Input frequency is 100MHz (400mV p-p sine wave, V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Rise time is 2.5ns (typ, 20% to 80%, V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Fall time is 1.1ns (typ, 80% to 20%, V+ = 5.0V, V- = VGND = 0V, TA = 25°C)
• Clock slew rate is 2 - 4V/ns (typ, recommended for best linearity, TA = +25°C)
• 14 lead TSSOP package, operating temperature range from -40°C to +85°C

附註

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