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| 數量 | 價格 |
|---|---|
| 1+ | NT$8,301.790 |
| 10+ | NT$8,246.810 |
產品訊息
產品總覽
AD9690 is a 14bit, 500MSPS analogue-to-digital converter (ADC). The device has an on-chip buffer and sample and-hold circuit designed for low power, small size, and ease of use. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. Typical applications include communications, multiband, multimode digital receivers (3G/4G, TD-SCDMA, W-CDMA, GSM, LTE), general-purpose software radios, ultrawideband satellite receivers, instrumentation, radars, Signals intelligence (SIGINT), DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers and wideband digital pre-distortion.
- 1.5W total power at 500MSPS (default settings) and noise density of -153dBFS/Hz
- SFDR of 83dBFS at fIN = 10MHz, SNR of 69.2dBFS at fIN = 10MHz
- ENOB of 11.2bits at fIN = 10MHz, ±0.5LSB typ DNL and ±2.5LSB typ INL
- No missing codes, internal ADC voltage reference, differential clock input and small signal dither
- Flexible input range from 1.46V p-p to 2.06V p-p (2.06V p-p nominal)
- 1.25V, 2.5V and 3.3V DC supply operation
- 2GHz usable analogue input full power BW and amplitude detect bits for efficient AGC implementation
- Flexible JESD204B lane configurations
- 64 lead LFCSP-EP package
- Operating temperature range from -40°C to 85°C
附註
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技術規格
Pipelined
500MSPS
Single
SPI
3.4V
LFCSP-EP
Surface Mount
85°C
-
No SVHC (04-Feb-2026)
14bit
1Channels
Differential
1.22V
LFCSP-EP
64Pins
-40°C
Single 14-Bit Pipelined ADCs
MSL 3 - 168 hours
法規與環境保護
承擔產品生產最後程序之國家原產地:United States
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證