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| 數量 | 價格 |
|---|---|
| 1+ | NT$1,873.130 |
| 5+ | NT$1,801.770 |
| 10+ | NT$1,730.410 |
| 25+ | NT$1,533.430 |
產品訊息
產品總覽
CY7C1069G30-10ZSXI is a 16Mbit (2M words × 8 bit) dual chip enable high-performance CMOS fast static RAM with error-correcting code (ECC). To write to the device, take chip enables (active-low CE1 LOW and active-low CE2 HIGH) and write enable (active-low WE) input LOW. To read from the device, take chip enables (active-low CE1 LOW and active-low CE2 HIGH) and output enable (active-low OE) LOW while forcing the write enable (active-low WE) HIGH. All I/Os (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (active-low CE1 HIGH or active-low CE2 LOW), and control signals are de-asserted (active-low CE1 / active-low CE2, active-low OE, active-low WE).
- Embedded error-correcting code (ECC) for single-bit error correction
- Low active current ICC is 90mA typical at 100MHz
- Low standby current ISB2 is 20mA typical
- 1.0V data retention
- Transistor-transistor logic (TTL) compatible inputs and outputs
- ERR pin to indicate 1-bit error detection and correction
- 2.2V to 3.6V voltage range
- High speed, tAA=10ns
- 54-pin TSOP II package
- Industrial ambient temperature range from -40°C to +85°C
技術規格
Asynchronous SRAM
2Mword x 8bit
54Pins
3.6V
-
-40°C
-
No SVHC (25-Jun-2025)
16Mbit
TSOP-II
2.2V
-
Surface Mount
85°C
MSL 3 - 168 hours
技術文件 (1)
法規與環境保護
承擔產品生產最後程序之國家原產地:Taiwan
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證