產品訊息
產品總覽
The 74HC273D is an octal positive-edge triggered D-type Flip-flop features clock and master reset (MR\) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the low-to-high clock transition. A low on MR\ forces the outputs low independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
- Common clock and master reset
- CMOS Input levels
- Complies with JEDEC standard No. 7A
應用
Industrial, Consumer Electronics, Computers & Computer Peripherals
警告
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
技術規格
74HC273
13ns
5.2mA
SOIC
Positive Edge
2V
74HC
-40°C
-
MSL 1 - Unlimited
D
122MHz
SOIC
20Pins
Non Inverted
6V
74273
125°C
-
No SVHC (25-Jun-2025)
74HC273D,653 的替代選擇
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法規與環境保護
承擔產品生產最後程序之國家原產地:Netherlands
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證