74LVC3G17DC,125

74LVC3G17DC,125 is a triple buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V environments. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. It is ideal for wave and pulse shapers for highly noisy environments.

• Wide supply voltage range from 1.65V to 5.5V
• Overvoltage tolerant inputs to 5.5V, direct interface with TTL levels
• High noise immunity, CMOS low power consumption
• IOFF circuitry provides partial power-down mode operation
• Total power dissipation is 250mW max at Tamb = -40°C to +125°C
• Output current is ±50mA maximum at VO = 0V to VCC
• Input leakage current is ±1μA max at VI = 5.5V or GND; VCC = 0V to 5.5V
• Propagation delay is 13.1ns max at -40°C to +125°C, VCC = 1.65V to 1.95V
• VSSOP8 package
• Temperature range from -40°C to +125°C