FDV302P

The FDV302P is a P-channel logic level enhancement-mode Digital FET produced using high cell density DMOS technology. This very high density process is especially tailored to minimize ON-state resistance. It is designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this one P-channel FET can replace several digital transistors with different bias resistors such as the DTCx and DCDx series.

• Very low level gate drive requirements allowing direct operation
• Gate-source Zener for ESD ruggedness, <gt/>6kV human body mode
• Compact industry standard surface-mount package
• Replace many PNP digital transistors (DTCx and DCDx) with one DMOS FET