產品訊息
SN74AHC74DR 的替代選擇
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產品總覽
The SN74AHC74DR is a dual positive-edge-triggered D-type Flip-flop with clear and preset. A low level at the preset (PRE\) or clear (CLR\) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
- Latch-up performance exceeds 250mA per JESD 17
- ESD Protection exceeds JESD 22
- Green product and no Sb/Br
應用
Industrial
技術規格
74AHC74
6.1ns
8mA
SOIC
Positive Edge
2V
74AHC
-40°C
-
MSL 1 - Unlimited
D
110MHz
SOIC
14Pins
Differential / Complementary
5.5V
7474
85°C
-
法規與環境保護
承擔產品生產最後程序之國家原產地:Malaysia
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證
