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| 數量 | 價格 |
|---|---|
| 1+ | NT$28.590 |
| 10+ | NT$18.740 |
| 100+ | NT$15.470 |
| 500+ | NT$14.820 |
| 1000+ | NT$14.280 |
| 2500+ | NT$13.740 |
| 5000+ | NT$13.040 |
產品訊息
產品總覽
The TPS51200DRCR is a 3A sink/source DDR Termination Regulator with VTTREF buffered. It is specifically designed for low input voltage and low-noise systems where space is a key consideration. It maintains a fast transient response and only requires a minimum output capacitance of 20μF. In addition the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
- Sink and source termination regulator includes droop compensation
- REFIN input allows for flexible input tracking either directly or through resistor divider
- Remote sensing (VOSNS)
- ±10mA Buffered reference (REFOUT)
- Built-in soft start, UVLO and OCL
- Thermal shutdown
- Meets DDR and DDR2 JEDEC specifications
應用
Sensing & Instrumentation, Consumer Electronics, Communications & Networking, Computers & Computer Peripherals, Signal Processing, Test & Measurement, Wireless, Imaging, Video & Vision, HVAC, Medical
技術規格
DDR, DDR2, DDR3, DDR3L, DDR4
2.375V
VSON
Surface Mount
85°C
MSL 2 - 1 year
-
3.5V
10Pins
-40°C
-
No SVHC (27-Jun-2018)
技術文件 (1)
TPS51200DRCR 的替代選擇
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法規與環境保護
承擔產品生產最後程序之國家原產地:United States
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證