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| 數量 | 價格 |
|---|---|
| 1+ | NT$5,751.480 |
| 10+ | NT$5,291.090 |
| 25+ | NT$4,830.690 |
| 100+ | NT$4,623.730 |
產品訊息
產品總覽
AD9613 is a dual 12bit, ADC with sampling speeds of up to 210MSPS. The AD9613 is designed to support communications applications where low cost, small size, wide bandwidth and versatility are desired. The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user - selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer(DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. Typical application includes communications, diversity radio systems, multimode digital receivers (3G), TD-SCDMA, wiMAX, W-CDMA, CDMA2000, GSM, EDGE, LTE, I/Q demodulation systems, smart antenna systems, general-purpose software radios, ultrasound equipment and broadband data applications.
- SNR of 6 9.5dBFS at 185MHz fIN and 210MSPS
- SFDR = 83dBc at 185MHz fIN and 170MSPS
- 1.8V supply voltage
- LVDS (ANSI-644 levels) outputs
- Integer 1- to-8 input clock divider (625MHz maximum input)
- IF sampling frequencies of up to 400MHz
- ADC clock duty cycle stabilizer and 95dB channel isolation/crosstalk
- Serial port control and energy-saving power-down modes
- 64 lead LFCSP-VQ-EP package
- Operating temperature range from -40°C to 85°C
附註
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技術規格
Pipelined
210MSPS
Differential
SPI
LFCSP-VQ-EP
LFCSP-VQ-EP
Surface Mount
85°C
MSL 3 - 168 hours
12bit
2Channels
Single
1.7V
1.9V
64Pins
-40°C
Dual 12-Bit Pipelined ADCs
No SVHC (04-Feb-2026)
法規與環境保護
承擔產品生產最後程序之國家原產地:Philippines
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證
