100 即日起您可預購補貨
| 數量 | 價格 |
|---|---|
| 1+ | NT$450.540 |
| 10+ | NT$355.610 |
| 50+ | NT$317.550 |
| 100+ | NT$305.770 |
| 250+ | NT$293.320 |
| 500+ | NT$285.820 |
產品總覽
The DS1100LU-50+ is a 3.3V 5-tap economy timing element (delay line) in 8 pin µMAX package. It is characterized for operation over the range 3V to 3.6V. The DS1100LU-50+ delay line has five equally spaced taps. It is offered in surface-mount packages to save PCB area. This 5-tap silicon delay line reproduces the input-logic state at the output after a fixed delay of 50ns and it has 10ns delay time per tap. It is designed to reproduce both leading and trailing edges with equal precision. Each tap is capable of driving up to 10 74LS loads.
- Supply voltage range is 3V to 3.6V
- Operating temperature range from -40°C to 85°C
- Delays are stable and precise
- Low power CMOS and TTL/CMOS compatible
- Vapour phase and IR solderable
應用
Clock & Timing
警告
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
附註
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技術規格
5
50ns
3.6V
8Pins
-40°C
MSL 1 - Unlimited
10ns
3V
µMAX
-
85°C
No SVHC (04-Feb-2026)
技術文件 (1)
法規與環境保護
承擔產品生產最後程序之國家原產地:Philippines
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證