MAX9381ESA+

The MAX9381ESA+ is a lowest power 3.0GHz ECL/PECL differential data and clock D flip-flop in 8 pin NSOIC package. This differential data, differential clock D flip-flop is pin compatible with the ON Semiconductor MC100EP52 with the added benefit of a wider supply voltage range from 2.25V to 5.5V and 25% lower supply current. Data enters the master part of the flip-flop when the clock is low and is transferred to the outputs upon a positive transition of the clock. Interchanging the clock inputs allows part to be used as a negative edge triggered device. The MAX9381 utilizes input clamping circuits that ensure the stability of the outputs when the inputs are left open or at VEE. Typical applications include precision clock and data distribution, central office, DSLAM, DLC, base station and ATE.

• 3.0GHz operating clock frequency
• 0.2psRMS added random jitter
• 328ps typical propagation delay
• PECL operation from VCC = 2.25V to 5.5V with VEE = 0V
• ECL operation from VEE = -2.25V to -5.5V with VCC = 0V
• Input safety clamps ensure output stability when inputs are open or at VEE
• ±2KV ESD protection (human body model), 120ps differential output rise/fall time at +25°C
• Power supply current is 20mA at +25°C, propagation delay is 328ps at +25°C
• 100ps set-up time, 50ps hold time, 0.2ps (RMS) added random jitter at +25°C
• Operating temperature range from -40°C to +85°C
• Automated Test Equipment (ATE); Central Office Telecom Equipment; DLCs; DSLAM; Precision Clock and Data Distribution; Wireless Base Stations

應用

Signal Processing

警告

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.

附註

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party