8SLVD1204-33NLGI8

8SLVD1204-33NLGI8 is a high-performance differential LVDS fanout buffer in a 16 pin VFQFPN package. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVD1204-33 is characterized to operate from a 3.3V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVD1204-33 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and four low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

• Two selectable differential clock input pairs and 4 low skew, low additive jitter LVDS output pairs
• Differential PCLKx, nPCLKx pairs can accept the following differential input levels: LVDS, LVPECL
• Maximum input clock frequency: 2GHz
• LVCMOS/LVTTL interface levels for the control input select pin
• Output skew: 20ps (maximum), propagation delay: 310ps (maximum)
• Low additive phase jitter, RMS; fREF = 156.25MHz, VPP = 1V, 10KHz - 20MHz: 100fs (maximum)
• Full 3.3V supply voltage
• Ambient operating temperature range from- 40°C to 85°C