IS43LQ16256B-062BLI

IS43LQ16256B-062BLI is a 256Mb x 16 4Gbit CMOS LPDDR4 SDRAM. The device is organized as 1 channel per device, and the channel is 8-banks and 16-bits. This product uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 16N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 16n bits prefetched to achieve very high bandwidth.

• 8 internal banks per channel, clock-stop capability
• LVSTL(low voltage swing terminated logic) I/O interface, internal VREF and VREF training
• Maximum clock frequency is 1600MHz
• 16n pre-fetch DDR architecture
• Single data rate (multiple cycles) command/address bus
• Bidirectional/differential data strobe per byte of data (DQS/DQS#)
• Programmable burst lengths (16 or 32), ZQ calibration
• On-chip temperature sensor whose status can be read from MR4
• 200 ball FBGA package
• Industrial temperature range from -40°C to +95°C