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| 數量 | 價格 |
|---|---|
| 1+ | NT$162.560 |
| 25+ | NT$141.550 |
| 100+ | NT$136.620 |
| 160+ | NT$134.340 |
產品訊息
產品總覽
The LAN83C185-JT is a low-power highly integrated Analog Interface IC for high-performance embedded Ethernet applications. The LAN83C185 requires only a single +3.3V supply. It consists of an encoder/decoder, scrambler/descrambler, transmitter with wave shaping and output driver, twisted-pair receiver with on-chip adaptive equalizer and baseline wander (BLW) correction, clock and data recovery and Media Independent Interface (MII). It is fully compliant with IEEE 802.3/ 802.3u standards and supports both 802.3u compliant and vendor-specific register functions. It contains a full-duplex 10Base-T/100Base-TX transceiver and supports 10-Mbps (10BASE-T) operation on Category 3 and Category 5 unshielded twisted-pair cable and 100Mbps (100Base-TX) operation on Category 5 unshielded twisted-pair cable.
- Single chip Ethernet Phy
- Fully compliant with IEEE 802.3/802.3u standards
- Supports auto-negotiation and parallel detection
- Automatic polarity correction
- Integrated DSP with adaptive equalizer
- Baseline wander (BLW) correction
- Media independent interface (MII)
- 802.3u Compliant register functions
- Vendor specific register functions
- Comprehensive power management
- General power-down mode
- Energy detect power-down mode
- 0.18 Micron technology
- Low power consumption
應用
Wireless, Embedded Design & Development, Communications & Networking, Consumer Electronics, Imaging, Video & Vision, Computers & Computer Peripherals
警告
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
技術規格
Ethernet PHY Transceiver
2.97V
TQFP
Surface Mount
70°C
-
No SVHC (04-Feb-2026)
IEEE 802.3, IEEE 802.3u
3.63V
64Pins
0°C
-
MSL 3 - 168 hours
法規與環境保護
承擔產品生產最後程序之國家原產地:United States
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證

