產品訊息
產品總覽
The 74LVC4245APW is an octal dual supply Translating Transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 and 5V bus in a mixed 3 and 5V supply environment. The device features an output enable input (pin OE) for easy cascading and a send/receive input (pin DIR) for direction control. Pin OE controls the outputs so that the buses are effectively isolated. In suspend mode, when VCC(A) is zero, there will be no current flow from one supply to the other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode (typical 0.7V).
- 5V Tolerant inputs/outputs, for interfacing with 5V logic
- CMOS low-power consumption
- Direct interface with TTL levels
- ±20μA Input leakage current and off-state output current
- 40μA Supply current
- Complies with JEDEC standard no. JESD8B/JESD36
應用
Industrial
技術規格
Transceiver, Translating
TSSOP
24Pins
3.6V
74245
125°C
-
No SVHC (25-Jun-2025)
74LVC424
TSSOP
1.5V
74LVC
-40°C
-
MSL 1 - Unlimited
74LVC4245APW,118 的替代選擇
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法規與環境保護
承擔產品生產最後程序之國家原產地:Thailand
承擔產品生產最後程序之國家
RoHS
RoHS
產品合規憑證