74LVT125D,118

74LVT125D,118 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (n active-low OE). A HIGH on n active-low OE causes the outputs to assume a high impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. It features ESD protection (HBM EIA/JESD22-A114-A exceeds 2000V, MM EIA/JESD22-A115-A exceeds 200V).

• Quad bus interface, 3-state buffers
• Wide supply voltage range from 2.7V to 3.6V, BiCMOS high speed and output drive
• Direct interface with TTL levels, overvoltage tolerant inputs to 5.5V
• Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
• Live insertion and extraction permitted, no bus current loading when output is tied to 5V bus
• Power-up 3-state, IOFF circuitry provides partial power-down mode operation
• Latch-up performance exceeds 500mA per JESD 78 Class II Level B
• Complies with JEDEC standard JESD8C (2.7V to 3.6V)
• Supply current is 0.13mA typ at (outputs HIGH, Tamb = -40°C to +85°C)
• Operating temperature range from -40°C to +85°C, SO14 package

警告

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