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| 數量 | 價格 |
|---|---|
| 1+ | NT$24,639.090 |
價格Each
最少: 1
多項: 1
NT$24,639.09
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產品訊息
製造商SEGGER
製造商產品編號8.08.28
訂購代碼2364728
其他名稱8.08.28 J-Link PLUS
技術資料表
IC Product TypeEmulator
Silicon Family NameARM7 / ARM9 / Cortex
Core ArchitectureARM
Core Sub-ArchitectureARM7 / ARM9 / ARM11 / Cortex-A / Cortex-R / Cortex-M
Kit ContentsJ-Link PLUS Emulator, USB Cable, 0.1" JTAG/SWD Ribbon Cable
FeaturesSupporting Large Number of CPU Cores, J-Link is Supported by all Major IDEs
Product Range-
SVHCNo SVHC (14-Jun-2023)
產品總覽
8.08.28 J-LINK PLUS is a debug probe. Based on a 32 bit RISC CPU, it can communicate at high speed with the supported target CPUs. J-Link is used around the world in tens of thousands of places for development and production (flash programming) purposes. J-Link is supported by all major IDEs such as IAR EWARM, Keil MDK, Rowley CrossWorks, Atollic TrueSTUDIO, IAR EWRX, Renesas HEW, Renesas e2studio, and many others.
- Dimension is 152.4mm x 209.55mm x 44.45mm
- Supports ARM Cortex Cores, ARM Legacy Cores, Microchip PIC32, Renesas RX, RISC-V, SiLabs 8051
- Target interfaces are cJTAG, FINE, ICSP, JTAG, SWD, SWO
- ETB trace interface
- Standard (1MB/s) target interface speed
內容
J-Link PLUS, 20-pin 0.1" target ribbon cable, USB cable.
技術規格
IC Product Type
Emulator
Core Architecture
ARM
Kit Contents
J-Link PLUS Emulator, USB Cable, 0.1" JTAG/SWD Ribbon Cable
Product Range
-
Silicon Family Name
ARM7 / ARM9 / Cortex
Core Sub-Architecture
ARM7 / ARM9 / ARM11 / Cortex-A / Cortex-R / Cortex-M
Features
Supporting Large Number of CPU Cores, J-Link is Supported by all Major IDEs
SVHC
No SVHC (14-Jun-2023)
法規與環境保護
原產地:
承擔產品生產最後程序之國家原產地:Germany
承擔產品生產最後程序之國家
承擔產品生產最後程序之國家原產地:Germany
承擔產品生產最後程序之國家
關稅編號:90308200
US ECCN:3A992.a
EU ECCN:NLR
符合 RoHS 規定:不適用
符合 RoHS 鄰苯二甲酸酯類規定:不適用
SVHC:No SVHC (14-Jun-2023)
下載產品合規憑證
產品合規憑證
重量 (公斤):.219539