ST8500TR

ST8500TR is a programmable power line communication modem system on chip. It is able to run any PLC protocol in frequency band upto 500kHz. This chip architecture has been designed to target CENELEC EN50065, FCC and ARIB compliant applications supporting all major PLC protocol standards such as ITU G.9904 (PRIME), ITU G.9903 (G3-PLC®) and many other possible PLC protocol.

• PGA with automatic gain control and ADC
• DAC with transmission pre-driver, case style is QFN56
• Digital transmission level control, operating temperature range is -40°C 105°C
• Zero crossing comparator, upto 500kHz PLC signal bandwidth
• Dedicated code and data SRAM memories, 200MHz maximum frequency
• 256kB of embedded SRAM for code and data, 96kB of embedded SRAM for data
• Bootloader ROM memory, serial wire and JTAG interfaces
• 2.5V internal linear regulator for analogue, 1.1V external supply voltage for digital
• 3.3V external supply voltage for I/O and analogue
• 4 general purpose timers, 25MHz external crystal for system clock